BACKBENCHER

Digital System Design Semester :  III Course Code : 18EE35 CIE Marks : 40                       SEE Marks : 60 DIGITAL SYSTEM DESIGN18EE35 SYLLABUS Module-1 Principles of Combinational Logic: Definition of combinational logic, canonical forms, Generation of switching equations from truth tables, Karnaugh maps-3,4,5 variables, Incompletely specified […]

Analog Electronic Circuits VTU Subject code 18EE34 Semester 3rd Sem ANALOG ELECTRONIC CIRCUITS18EE34 SYLLABUS Module-1 Diode Circuits: Diode clipping and clamping circuits.Transistor Biasing and Stabilization: Operating point, analysis and design of fixed bias circuit, self-bias circuit, Emitter stabilized bias circuit, voltage divider bias circuit, stability factor of different biasing circuits. Problems. Transistor switching circuits. DOWNLOAD

Transformers and Generators VTU Subject code 18EE33 Semester 3rd Sem TRANSFORMERS AND GENERATORS18EE33 SYLLABUS Module-1 Single phase Transformers: Operation of the practical transformer under no-load and on-load with phasor diagrams. Open circuit and Short circuit tests, calculation of equivalent circuit parameters and predetermination of efficiency-commercial and all-day efficiency. Voltage regulation and its significance.Three-phase Transformers: Introduction,

Electric Circuit Analysis VTU Subject code 18EE32 Semester 3rd Sem ELECTRIC CIRCUIT ANALYSIS18EE32 SYLLABUS Module-1 Basic Concepts: Active and passive elements, Concept of ideal and practical sources. Source transformation and Source shifting, Concept of Super-Mesh and Supernode analysis. Analysis of networks by (i) Network reduction method including star-delta transformation, (ii) Mesh and Node voltage methods