Digital System Design
Semester : III
Course Code : 18EE35
CIE Marks : 40 SEE Marks : 60
DIGITAL SYSTEM DESIGN
18EE35
SYLLABUS
Module-1
Principles of Combinational Logic: Definition of combinational logic, canonical forms, Generation of switching equations from truth tables, Karnaugh maps-3,4,5 variables, Incompletely specified functions (Don‘t care terms) Simplifying Max term equations, Quine-McCluskey minimization technique, Quine-McCluskey using don‘t care terms, Reduced prime implicants Tables
Module-2
Analysis and Design of Combinational logic: General approach to combinational logic design, Decoders, BCD decoders, Encoders, digital multiplexers, Using multiplexers as Boolean function generators, Adders and subtractors, Cascading full adders, Look ahead carry, Binary comparators.
Module-3
Flip-Flops: Basic Bistable elements, Latches, Timing considerations, The master-slave flip-flops (pulse-triggered flip-flops): SR flip-flops, JK flip-flops, Edge triggered flip- flops, Characteristic equations.
Module-4
Flip-Flops Applications: Registers, binary ripple counters, synchronous binary counters, Counters based on shift registers, Design of a synchronous counter, Design of a synchronous mod-n counter using clocked T, JK, D and SR flip-flops.
Module-5
Sequential Circuit Design: Mealy and Moore models, State machine notation, Synchronous Sequential circuit analysis, Construction of state diagrams, counter design.
Memories: Read-only and Read/Write Memories, Programmable ROM, EPROM, Flash memory