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basic vlsi design

Semester :  VI

Course Code : 18EC655

CIE Marks : 40                       SEE Marks : 60

 Module – 1

Printed Notes

 Module – 2

Printed Notes

 Module – 3

Printed Notes

 Module – 4

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 Module – 5

Printed Notes

Also check: Full Notes




Moore’s law, speed power performance, nMOS fabrication, CMOS fabrication: n-well, pwell processes, BiCMOS, Comparison of bipolar and CMOS.
Basic Electrical Properties of MOS And BiCMOS Circuits: Drain to source current versus voltage characteristics, threshold voltage, transconductance.


Basic Electrical Properties of MOS And BiCMOS Circuits: nMOS inverter, Determination of pull up to pull down ratio: nMOS inverter-driven through one or more pass transistors, alternative forms of pull up, CMOS inverter, BiCMOS inverters, latch-up.
Basic Circuit Concepts: Sheet resistance, area capacitance calculation, Delay unit, inverter delay, estimation of CMOS inverter delay, super buffers, BiCMOS drivers. 


MOS and BiCMOS Circuit Design Processes: MOS layers, stick diagrams, nMOS design style, CMOS design style
Design rules and layout & Scaling of MOS Circuits: λ – based design rules, scaling factors for device parameters


Subsystem Design and Layout-1: Switch logic pass transistor, Gate logic inverter, NAND gates, NOR gates, pseudo nMOS, Dynamic CMOS
Examples of structured design: Parity generator, Bus arbitration, multiplexers, logic function block, code converter.


Subsystem Design and Layout-2: Clocked sequential circuits, dynamic shift registers, bus lines, General considerations, 4-bit arithmetic processes, 4-bit shifter, Regularity-Definition & Computation
Practical aspects and testability: Some thoughts of performance, optimization and CAD tools for design and simulation.